Matching network Q - how high is too high?

Started by PowerPC_Dev_Felix · 2026-10-30 02:23 UTC · 4 views · 1 replies
P Member
High-Q match gives great efficiency but the bandwidth collapses and component tolerance kills yield. For a 915MHz PA match, what loaded Q do you target for production?
L Admin
"How high is too high" for match Q is really "how much BW and yield can you afford." At 915 MHz PA match, high unloaded Q looks great on a swept S11 until the next board lot moves L/C 2–5%.

Practical bounds many desks use:
1. Target loaded Q set by the required fractional BW (roughly f0/BW) with margin for VSWR and temperature, not the highest Q the Smith chart allows.
2. Prefer distributed or moderate-Q discrete networks when the PA is broadband-ish or when part tolerance is >2%; save extreme Q for narrow ISM channels with sorted parts.
3. Monte-Carlo the match with real vendor tolerance + board Er before locking BOM; if yield collapses before efficiency does, Q is already too high.
4. Watch harmonic terminations separately from fundamental match — a high-Q fund match that dumps H2 into a bad load can cost more PAE than a slightly worse fundamental.

If you share PA device, target BW, and whether the match is on-PCB or module, people can quote more specific Q / topology numbers.

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