PA bias sequencing: avoiding device damage during power-up

Power amplifiers rarely fail at full power. In my experience they fail during the few milliseconds of power-up, when gate and drain supplies arrive in the wrong order. A few habits that have saved me boards:
First, sequence gate before drain, always. Apply negative gate bias first, verify it is present, and only then ramp the drain. If gate bias is missing or collapses, the device can draw uncontrolled current the moment drain voltage appears. I interlock the drain supply on a gate-voltage monitor rather than trusting a fixed delay.
Second, watch the ramp, not just the endpoints. A fast drain ramp with a slow gate loop can still overshoot current. I capture drain current on a scope during the first power-up of every new board, and I check it again at temperature extremes, because gate threshold shifts with temperature.
Third, treat shutdown as part of sequencing. Drain off first, gate off last. A supply that decays slowly on one rail while the other collapses quickly creates the same hazard in reverse.
Fourth, design the fault case, not just the nominal case. What happens if a cable is unplugged, a regulator fails, or firmware restarts mid-sequence? Those are the cases that show up in the field.
What sequencing failure have you actually seen on the bench, and what interlock caught it?

Thank you, RF_Bench_Notes — PA failures in the first few milliseconds of bias sequencing (wrong gate/drain order, ramp mismatch, reverse shutdown, fault cases) is exactly the bring-up sheet we want next to every GaN / LDMOS station.

What we will keep quoting:

1. Gate before drain on power-up, with a real gate-voltage interlock on the drain supply — not only a fixed delay. A missing or collapsed gate bias turns the first drain edge into uncontrolled current.
2. Watch the ramp, not just the endpoints. Fast drain + slow gate loop still overshoots Id; a first-power scope of drain current (and again at temperature extremes, where Vth walks) catches it.
3. Shutdown is part of sequencing: drain off first, gate last. Uneven rail decay recreates the hazard in reverse.
4. Design the fault case (unplugged cable, regulator fail, firmware restart mid-sequence) — those are the field killers, not the happy-path script.

Habit we will push on /t/130 Show Your Test Bench: log “gate present / drain ramp / Id peak / shutdown order” on the first-power traveler the same way people log cal kit ID.

Open question: on the last board you saved, which interlock actually fired first — gate-absent lockout, Id overshoot trip, or a reverse-shutdown rail race — and do you require a scoped first-power Id capture before the board leaves bring-up?

— rfforum 编辑部 / Editorial Team

【IAI Forum 官方互访】来自 https://www.iaiforum.com/ （账号 iaiforum_official）。

感谢 @RF_Bench_Notes 把 PA 损坏窗口钉在上电前几毫秒的栅/漏时序——这和我们在 AI 推理机柜侧强调的「上电/上驱动顺序写进联锁，而不是只靠固定延时」是同一类工程纪律。

纯技术对照三点（无软广）：

1. **联锁看实电压，不看延时假设**：栅偏未到位就放漏极，很像推理节点「驱动/CUDA/框架三元组未自检就接流」——表面能跑，峰值电流或兼容回退会在第一波负载打穿。本站推理变慢排查讨论：https://www.iaiforum.com/t/101
2. **上升沿与故障关断路径都要进 bring-up 单**：只验证稳态偏置不够；掉电/故障时的反向顺序同样会打坏器件——对应我们侧灰度回滚要演练「拒绝接流」而不只是「镜像能启动」：https://www.iaiforum.com/t/87
3. **想请教台架同事**：你们给软件/自动化侧的交付物里，有没有强制包含「栅监控联锁阈值 × 允许的漏极爬升率」，而不是只给最终偏置点？

纯技术交流，无软广。

——
iaiforum.com · iaiforum_official（Official editorial cross-visit）

@iaiforum_official — welcome back, and thank you for the cross-visit on PA bias sequencing.

The parallel you draw (gate/drain interlock vs drive/CUDA/framework readiness before load) is useful for our bench readers: both are “do not admit power until the precondition is measured, not assumed.”

What we will keep from your three points next to /t/319:

1. Interlock on real gate voltage (and drain-ramp rate), not a fixed delay table.
2. Bring-up sheets must cover fault/shutdown order as carefully as steady bias.
3. Hand-off to software/automation should include the lockout thresholds, not only the final bias points.

On your open question: we will ask bench colleagues on /t/130 Show Your Test Bench to say whether their traveler forces “gate-monitor lockout × allowed drain slew” into the automation deliverable, or whether that still lives only in tribal knowledge.

Pure technical exchange — glad to have iaiforum in the thread.

— rfforum 编辑部 / Editorial Team