Most suspicious S-parameters I have been asked to review traced back to the ports, not the mesh or the materials. The port is where the solver decides what the "incident wave" is, so if it is wrong everything downstream is wrong too.

1. What each port type does
A wave port solves a 2D eigenmode problem on its cross-section and launches that field pattern into the structure. It knows the true modal field and propagation constant of the line, so it is the accurate choice for any guided line that reaches the boundary of the model: microstrip, stripline, CPW, coax, waveguide.

A lumped port is an ideal source with a reference impedance placed across a small gap. It does not know anything about the line it is attached to. It is the right choice for internal excitation points: a feed gap in a dipole, the pins of a chip, a port between two pads.

2. Wave port sizing for planar lines
The port face must be big enough to contain essentially all of the field of the mode, but not so big that the port box itself supports a higher-order waveguide mode.
Common starting points for microstrip: port height about 6 to 10 times the substrate thickness, and port width around 10 times the trace width for wide traces, or several substrate heights for narrow traces. For CPW, the port should cover the gaps plus a few gap-widths of the side grounds and touch the ground on both sides.
Then check rather than trust:
- Look at the port field plot. The field should have decayed to almost nothing at the port walls.
- Ask the solver for 2 or 3 modes on the port and check that the second mode is below cutoff (evanescent) up to your highest frequency. If a box mode propagates, shrink the port or add the missing ground.
- Sweep the port size up and down by 30 %. The line impedance should change by well under 1 %.

3. Placement
- Put wave ports on the outer boundary of the model, on a straight uniform section of line.
- Leave a length of uniform line between the port and the first discontinuity. Higher-order modes generated at a bend or a via decay over a distance of the order of the line cross-section, and they must die out before they reach the port. A few substrate heights is the usual minimum.
- Then de-embed that lead-in line back to the reference plane you actually care about. Every solver can shift the reference plane by the known propagation constant of the port mode.

4. Lumped port pitfalls
- Keep the port small compared with the wavelength, well under lambda/10 and preferably under lambda/20 at the top frequency. A large lumped port adds series inductance that shows up as a frequency-dependent mismatch.
- Give it a short, direct return path. A lumped port that connects a trace to a ground plane 1 mm away with no via is measuring the loop inductance of your port, not your circuit.
- Use a reference impedance that matches what you will normalize to later, then renormalize the S-parameters if needed rather than changing the port mid-project.

5. Impedance definitions
For non-TEM lines (microstrip is quasi-TEM, CPW and waveguide are not TEM), "characteristic impedance" depends on definition: power-current, power-voltage or voltage-current. The values can differ by several percent. Pick the definition consistent with how the structure will be measured or connected, usually power-current for planar lines, and use the same definition across the whole project.

6. Quick sanity tests
- Simulate a straight 50 ohm line alone with the same ports. |S11| should be below about -35 dB across the band, and the phase of S21 should match beta times length. If not, fix the ports before anything else.
- Reciprocity: S21 should equal S12 for a passive structure without magnetized materials.
- Passivity: the sum |S11|^2 + |S21|^2 should be at most 1 at every frequency.

Ten minutes on the bare-line test saves days of chasing a resonance that only exists in the port.