Every S-parameter plot is only as honest as the calibration behind it. SOLT (Short-Open-Load-Thru) is what most benchtop kits ship; TRL (Thru-Reflect-Line) is what on-wafer and fixture work often need. Knowing which errors each one absorbs saves days of chasing "the DUT looks wrong".

1. What a 12-term / 8-term model is correcting
A two-port VNA sees directivity, source match, reflection tracking, transmission tracking, load match and crosstalk on each path. SOLT uses known Short, Open, Load and a Thru to solve those terms at each frequency. TRL uses a Thru, a Reflect (same unknown on both ports) and one or more Lines of known length difference to solve a subset with fewer absolute assumptions.

2. Where SOLT is fine
- Coax connectors up to ~18 GHz with a good kit (sliding load or broadband load)
- Connectorized filters, amplifiers and cables where the reference plane is the connector
- Everyday production checks where ±0.1 dB / a few degrees is enough

SOLT fails when the kit definitions do not match the media: a coax Short/Open/Load definition applied at a PCB probe pad, or a 3.5 mm kit used on SMA with adapters left outside the cal.

3. Where TRL wins
- Microstrip or CPW fixtures where you can print Thru, Reflect and Line on the same board family
- On-wafer probes with ISS (impedance standard substrate) TRL / LRRM
- Cases where Load standards are the weak link (loads are hard to make perfect at mmWave)

TRL does not need a perfect 50 ohm load. It needs a consistent Reflect and a Line whose length difference is not near 0 or 180 deg in the band (typically 20 to 160 deg). Multi-line TRL covers wide bands by using several lines.

4. Practical failure modes
- Bad Open capacitance / Short inductance coefficients in the SOLT kit file: resonance frequencies of cavities and antennas shift in the plot even when the DUT did not.
- Adapter removal skipped: the adapter becomes part of the DUT.
- TRL Line too close to 180 deg at the upper band edge: ill-conditioned math, wild S11 spikes.
- Different probe landing each time: contact resistance looks like a gain change; use overtravel discipline and a contact resistance check.

5. A field decision tree
Connectorized, <18 GHz, good kit: SOLT.
PCB fixture you control: print TRL on the panel, or do fixture de-embedding with a measured 2xThru.
On-wafer >40 GHz: multi-line TRL or LRRM from a trusted ISS, not a coax SOLT plus adapters.
Unsure: measure a known verification standard (airline, attenuator) after cal; if it fails, fix the cal before blaming the DUT.

Calibration is not a ritual. It is an assertion about the reference planes. Write those planes down next to the plot.